· This paper presents a high-speed method for computing elementary functions using parallel table lookups and multi-operand addition. Increasing the number of tables and inputs to the multi-operand adder significantly reduces the amount of memory required. Symmetry and leading zeros in the table coefficients are used to reduce the amount of memory even further. This method has a closed . AltiVec technology is Motorola's high-performance vector parallel processing extension to the PowerPC tm RISC microprocessor. AltiVec(TM) Technology Programming Environments Manual, 3 edition. AltiVec™ Technology in PublicationsAltiVec™ Technology in Publications “The ability to access a high-performance vector unit in addition to the integer and floating point units in the RISC core provides a leap in performance beyond the traditional advances in CPU clock frequency .
The AltiVec Programming Interface Specification defines the VRSAVE register to be used as a bitmask of vector registers in use. AIX requires that an application never modify the VRSAVE register. The first 12 vector parameters in a function are placed in VR2 through VR ALTIVECPIM/D 6/ Rev. 0 AltiVec Technology Programming Interface Manual ™ Freescale Semiconductor, I Freescale Semiconductor, Inc. For More Information On This Product. [4] AltiVec Technology Programming Environments Manual, 11/, Rev. ; Page has usage recommendations. [5] AMD Extensions to the 3DNow![tm] and MMX[tm] Instruction Sets, AMD, Publication D, March [6] The IA Intel Architecture Software Developer's Manual, Volume 2: Instruction Set Reference.
missing instructions for some SWAR operations that are needed to support [Mot98] Motorola Inc., AltiVec Technology Programming Environments Manual, Rev. with the combined PowerPC architecture and AltiVec technology. Because the AltiVec enhancement introduces. new instructions oriented to highly parallel. Book III-E, Power ISA Operating Environment Architecture – Embedded Environment, In: AltiVec technology programming environments www.doorway.ru Scholar.
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